(87d) Copper-to-Copper Electroless Bonding for High-Density off-Chip Interconnects | AIChE

(87d) Copper-to-Copper Electroless Bonding for High-Density off-Chip Interconnects


Saha, R. - Presenter, Georgia Institute of Technology
Koo, H. - Presenter, Georgia Institute of Technology
Kohl, P. - Presenter, Georgia Institute of Technology

Over the past several years, there has been an increasing demand for chip-to-chip and chip-to-package interconnects that can offer higher I/O density, better conductivity, and longer lifetimes for high speed integrated circuits. Copper-copper direct bonding is expected to be a potential candidate for high speed communications. Copper pillars electroplated on either chip or chip/substrate could be flip-chip bonded through electroless plating to produce a robust electrical/mechanical interconnect. Electroless bonding between Cu pillars could offer potential advantages due to its simple and fast process, and its ability to accommodate various process environments such as non-uniform offset between terminals [1]. In this presentation, fabrication of a void-free electroless Cu connection with control of electroless plating bath formulation will be discussed. The effect of several additives in the bath will also be studied. Thermomechanical reliability testing of chip-to-chip and chip-to-substrate bonding will also be discussed

The initial chip fabrication method is based on photo-lithography of high-aspect ratio polymers as a mold for through-hole Cu electroplating [2]. A variety of pillar diameters (300, 150, 50, 25, 15 um) and heights (0 and 20 µm) were tested for electroless bonding. High density and high aspect ratio interconnections could be fabricated with this technique. Addition of a leveler induced dome shaped top during electroplating which reduced void formation during electroless bonding. The chips containing pre-fabricated copper pillars were diced; flip-chip aligned using a flip-chip bonder and then dipped in electroless plating solution for bonding.

A wide range of accelerators and suppressor additives were investigated for electroless plating. A narrow gap between pillars hinders fluid flow during electroless deposition leading to trapped voids which could affect the mechanical and electrical integrity of the interconnects. A local suppressor is necessary to avoid the closing of the gap before deposition at the center. SPS (bis-(3-sulfopropyl)-disulfide) and similar molecules have been reported as diffusion-limited suppressors in electroless deposition [3], and their behavior was strongly dependent on the mass-transfer of its molecules, whereas polymer-based surface active suppressor (Polyethylene glycol, PEG) showed no strong dependence on the mass-transfer. Based on this result, it was shown that the addition of SPS could induce preferential Cu growth from the center to the outside of the gap between the two pillars. The effect of convection-currents on electroless deposition was also examined.

 Smaller diameter pillars could be advantageous due to a small aspect ratio as the adequate electrolyte filling between small pillars could mitigate void-formation. In the case of 50 um pillars, the void trapping was not observed in FIB (Focused Ion Beam) analysis even without local suppressor.

Thermomechanical reliability tests were carried out in order to analyze structure/electrical reliability of the interconnect structures. The samples were loaded in temperature cycling chamber and the mechanical integrity was analyzed after 100~500 times of temperature cycling (-40°C~ 125°C).  As shown in Fig. 3, most of the failure was observed in the interface between pillar and substrates and not within the electroless region. This implies that the bonding strength of electroless Cu region is stronger than the adhesion strength of Cu pillar-to-substrate. The fracture strength (50-110 MPa) (Table 1) of electroless bonded copper pillars with/without thermocycling was observed to be substantially higher than conventional solder-based bonding. Electrical continuity was measured through daisy-chain Cu-Cu structures fabricated on silicon. Integrity of the structures was retained even after high thermal cycling.


[1] T. Osborn, N. Galiba, and P. A. Kohl, J. Electrochem. Soc., 156 (7), D226 (2009).

[2] H.-C. Koo, C. H. Lightsey, and P. A. Kohl, IEEE trans. Compon. Packag. Manuf. Tech., accepted.

[3] S. Shingubara, Z. Wang, O. Yaegashi, R. Obata, H. Sakaue, and T. Takahagi, Electrochem. Solid St. Lett., 7(6), C78 (2004).

[4] C. H. Lee, S. C. Lee, and J. J. Kim, Electrochimica Acta, 50 (2005), 3563.


Fracture Stress (MPa)









Table 1.  Fracture stress of electroless copper bonds

 (~ 50 µm) with/without thermal cycling.