(5a) Patterning of Thin Polymer Films

Fabrication of micro and nano structures from polymeric materials has attracted significant attention for applications in the semiconductor and biotechnology industries. One such process, electrohydrodynamic patterning, has been shown to produce structures ranging from well ordered pillar arrays to concentric rings and gratings when guided by a template.

The process is initiated by positioning a template parallel to a flat silicon wafer, coated with a thin polymeric film, leaving a thin gap, and then raising the temperature above the glass transition/melting temperature of the film. Electric fields exert a force at the polymer-air interface, placing the film in tension or compression. The static equilibrium that results is unstable to disturbances with wavelengths for which the electrostatic force overcomes surface tension. Flow ensues, generating a pattern of cone-shaped spikes and then pillars in the film with periodicity reflecting the characteristic length of the instability. A template may guide the film into linear ridges and concentric rings, as polymer accumulates first under relief due to the locally accentuated electric field. Finally, cooling the film locks in the micron sized structure, which can be observed by removing the mask.

Here we demonstrate experimentally that pillars and ridges represent only two among a continuum of regular structures formed under both patterned and pattern free masks. These observations explain the dearth of pillars under conditions predicted to give the smallest diameters and tightest packings. We account for this paucity by arguing on the basis of these experiments that our and previous experiments have not been quenched soon enough, allowing sufficient time for merging to produce the typically micron sized pillars observed, as opposed to the submicron/nanometer structures desired. The results are qualitatively consistent with earlier simulations and provide clear evidence of surface tension driving the merging process. Our results also indicate the need for control of template-substrate separations within 15 nm to achieve wafer-scale arrays.