(428b) Atomic-Level Insights into Chemical Additives Used for Silicon-Containing Film Removal during Integrated Circuit Manufacturing

The evolution of the semiconductor industry over the past several decades has been greatly impacted by effective surface preparation and cleaning formulations. During integrated circuit (IC) manufacturing, cleaning is the most common operation, but the challenges in preparing the wafer surface for the next process step continue to increase as contamination tolerance is lowered, material removal limits decrease, and three‑dimensional fine features become more common. The advancement of novel formulation additives for removing contaminants and residues from earlier process steps have led to higher yields and enabled new integration schemes. First-principles analysis of etching mechanisms and additive function can significantly decrease experimental costs through initial virtual screening of potential substrates and additives. This presentation will focus upon the removal of silicon-containing materials used in ICs, such as SiO₂ and Si₃N₄, and relevant formulation additives used to remove these materials. Particularly, in this collection of studies, Density Functional Theory (DFT) was employed to examine the underlying thermochemistry and kinetics of etching mechanisms and additive function on substrates found in common ICs. Our studies have employed both cluster and periodic surface slab models, as well as mixed implicit and explicit solvation schemes, in efforts to balance computational time and accuracy. Modeling results were found to be in agreement with experiments and have provided insights on the parameters which should be considered in the formulation design for selective thin film removal. These results demonstrate how theoretical investigations are currently impacting formulation additive discovery and surface cleaning technology in industry.