(756d) Facile, Controllable Graphene-Based P-N Junctions Using Self-Assembled Monolayers

Authors: 
Kowalik, J., Georgia Tech
Vargas, J., Georgia Tech
Graham, S., Georgia Institute of Technology
Henderson, C. L., Georgia Institute of Technology


Graphene, a two-dimensional sp2 hybridized carbon lattice that is also the fundamental building block of graphite, has attracted significant interest recently due to its distinctive electrical and mechanical properties. An important challenge is to develop methods for controllably doping graphene, since such methods potentially give access to both p-type and n-type junctions and can allow for adjustment of the work function of graphene. In this study we investigate the use of a self-assembled monolayer (SAM) to create a p-n junction in graphene films. Previous techniques rely on charge transfer from adsorbants or electrostatic gate/potentials. Here we demonstrate that, by successfully modifying the SiO2 surface with an aminopropyltriethoxysilane (APTES) layer, and using intrinsically p-doped transferred CVD graphene films, a well-defined junction can be achieved. Field-effect transistors and p-n junction regions are fabricated prior to graphene film transfer, in order to preserve the pristine properties of the graphene. The I-V characteristic curve indicates the presence of two thermally-controllable neutrality points. This method allows a facile, controllable and low temperature fabrication of graphene p-n junctions.