(38b) Ultra-Low-k Pure-Silica Zeolite MEL Films by Incorporating Nanosized Voids

The development of ultra-low-dielectric-constant (k) materials to reduce parasitic capacitance, enable faster switching speeds, and lower power dissipation are critically demanded for the continuous downscaling of microprocessors. In particular, the requirements for the ultra-low-k films by 2012 involve not only a low k value of 1.8 to 2.1, but also high thermal conductivity, high mechanical strength, low surface roughness, high degree of hydrophobicity, as well as uniform pore size distribution. The semiconductor industry has so far developed suitable alternative films with the k values between 2.5 and 2.9; however, viable materials with a k value below 2.0 have been reported rarely. Pure silica zeolite (PSZ) films having MEL-type structures are recently promising ultra-low-k candidates. PSZs possess stronger mechanical strength, higher heat conductivity, and higher thermal stability than alternative amorphous low-k materials with similar porosity and k values because of their crystallinity. Based on a simple and efficient on-wafer crystallization method to deposit zeolite films for ultra-low-k application, here we attempt to incorporate nanosized voids in the amorphous silica phase of a PSZ film (assigned as A-MEL) between nanocrystals by using nanoscaled molecule as the porogen. As a result, the A-MEL film with nanosized voids are superior to our previously developed films in terms of the required properties for ultra-low-k dielectrics, such as the k value, elastic modulus, hardness, film striation, surface roughness, mesopore size, and size distribution.