(92a) GaAs Integration On High-Quality Ge On Si for Multijunction Solar Cells
In an effort to reduce the cost of multijunction solar cells, we have scaled up a process to produce low-defect-density Ge films on 2-inch-diameter Si substrates. These engineered substrates could replace Ge wafers that are currently used in multijunction solar cell fabrication if the Ge film quality on engineered substrates can match that of commercially available epi-ready Ge wafers. We will present results for the scaled up process of engineered Ge on Si substrates, including key aspects of nucleation, defect formation, and defect reduction/elimination, using a variety of characterization techniques. For ensuing GaAs growth, we polish the Ge surface, using a slurry-free H2O2 based chemical-mechanical planarization (CMP) process. This CMP technique results in a root mean square (RMS) roughness less than 1 nanometer as revealed by atomic force microscopy. However, stacking faults in the Ge film that terminate at the film surface show up as raised lines after polishing. We have found that thermal annealing at a very early stage of Ge film growth largely eliminates these stacking faults and produces much smoother films than those grown without the annealing step. We have used a combination of atomic force microscopy and transmission electron microscopy (TEM) to investigate the effect of annealing on eliminating the stacking faults and on the initial Ge island morphology. Next, we discuss our method for cleaning and passivating the Ge surface in preparation for GaAs growth. GaAs films grown on our engineered substrates have an RMS value of 3.6 nm and show integrated photoluminescence intensity that matches GaAs grown on commercially available off-cut Ge substrates. Future work and directions will be discussed in light of our findings.